DSP controlled power converter

A digital controller is designed and implemented by a Digital Signal Processor (DSP) to replace the Pulse Width Modulator (PWM) and error amplifier compensation network in a two wheeler forward converter. The DSP controller is designed in three approaches: a) Discretization of analog controller - the design is based on the transfer function of the error amplifier compensation network. b) Digital PID controller design - the design is based on the general form of the pulse transfer function of PID controller. c) Deadbeat controller design - the design is based on the open-loop pulse transfer function of the power converter. The controller design is optimised by running computer simulation with the MATLAB numerical calculation package and the experimental results agree with the simulated analysis.published_or_final_versio

Enhanced controlling of the SLS Process during a build

Current commercial Rapid Prototyping (RP) systems like Stereolithography (3D Systems Corporation) and Selective Laser Sintering (DTM Corporation) use galvanometers from General Scanning Inc. (GSI) for the positioning of the laser beam. The GSI scanners are delivered as a ''black box". Operating Consoles which are usually Personal Computers (PC) have very few feedback from the performance of the GSI scanners. Therefore, the PC spends 9000 or more of its time waiting for the GSI scanners to be over with the building of the current layer before sending the information regarding the next layer. Also, very little process control can be performed during the scanning of a layer using the GSI scanners. This kind of setup prevents any dynamic controlling of the process that could prevent building errors like burning, warping etc. At Clemson University, our team has developed both hardware and software components that allows a dynamic control of the building process. New features like scanning one vector with laser power as a function of position and/or time are now possible. Both hardware and software issues will be presented.Mechanical Engineerin

Active Vibration Control of Structures using an Impedance Matching Control Technique

Active vibration control of structures has gained a lot of interest in recent years. This paper presents an active vibration control methodology of a structure using piezoelectric actuators. The proposed methodology is useful in practical applications where the system to be controlled is difficult to model due to the presence of complex boundary conditions. The impedance matching control technique uses a power flow approach wherein the controller is designed such that the power flow into the structure is minimized. The system transfer function is obtained from the experimental collocated actuator/sensor pair data using Eigen Realisation Algorithm (ERA). The controller is designed for the system transfer function according to impedance matching theory. The above approach is targeted towards the vibration control of wind tunnel stings, which suffer from flow-induced vibration. A wind tunnel sting model is designed and fabricated for this study. The real time implementation of the impedance matching controller has been carried out using dSPACE® Digital Signal Processor (DSP) card. The results are encouraging and demonstrate the feasibility of applying this technique in the wind tunne

Continuous time controller based on SMC and disturbance observer for piezoelectric actuators

Abstract – In this work, analog application for the Sliding Mode Control (SMC) to piezoelectric actuators (PEA) is presented. DSP application of the algorithm suffers from ADC and DAC conversions and mainly faces limitations in sampling time interval. Moreover piezoelectric actuators are known to have very large bandwidth close to the DSP operation frequency. Therefore, with the direct analog application, improvement of the performance and high frequency operation are expected. Design of an appropriate SMC together with a disturbance observer is suggested to have continuous control output and related experimental results for position tracking are presented with comparison of DSP and analog control application

A Multifunctional Processing Board for the Fast Track Trigger of the H1 Experiment

The electron-proton collider HERA is being upgraded to provide higher luminosity from the end of the year 2001. In order to enhance the selectivity on exclusive processes a Fast Track Trigger (FTT) with high momentum resolution is being built for the H1 Collaboration. The FTT will perform a 3-dimensional reconstruction of curved tracks in a magnetic field of 1.1 Tesla down to 100 MeV in transverse momentum. It is able to reconstruct up to 48 tracks within 23 mus in a high track multiplicity environment. The FTT consists of two hardware levels L1, L2 and a third software level. Analog signals of 450 wires are digitized at the first level stage followed by a quick lookup of valid track segment patterns. For the main processing tasks at the second level such as linking, fitting and deciding, a multifunctional processing board has been developed by the ETH Zurich in collaboration with Supercomputing Systems (Zurich). It integrates a high-density FPGA (Altera APEX 20K600E) and four floating point DSPs (Texas Instruments TMS320C6701). This presentation will mainly concentrate on second trigger level hardware aspects and on the implementation of the algorithms used for linking and fitting. Emphasis is especially put on the integrated CAM (content addressable memory) functionality of the FPGA, which is ideally suited for implementing fast search tasks like track segment linking.Comment: 6 pages, 4 figures, submitted to TN

Development of an FPGA-based gate signal generator for a multilevel inverter

The application of Field Programmable Gate Array (FPGA) in the development of power electronics circuits control scheme has drawn much attention lately due to its shorter design cycle, lower cost and higher density. This paper presents an FPGA-based gate signal generator for a multilevel inverter employing an online optimal PWM switching strategy to control its output voltage. FPGA is chosen for the hardware implementation of the switching strategy mainly due to its high computation speed that can ensure the accuracy of the instants that gating signals are generated. The gate signal generator has been realized by an FPGA (FLEXlOKZO) from Altera. The design and development of the FPGA based gate signal generator is described in detail. Results from the timing simulation using MAX+PLUSII software are given and verified by the results obtained from the FLEXlOK2O output